Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/22635
Change subject: amd/stoneyridge/include/soc/northbridge.h: Cleanup ......................................................................
amd/stoneyridge/include/soc/northbridge.h: Cleanup
There are instances where the pound "#" is separated from the word "define", it should be all together "#define".
There are instances where bits are being declared as (1 << x), should be replaced by macro BIT(x).
BUG=b:62239898
Change-Id: I882bf1cc9d9e6b587b5dc3d27cea1626f4dcc51a Signed-off-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/soc/amd/stoneyridge/include/soc/northbridge.h 1 file changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/22635/1
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h index 0cf9428..e3cd212 100644 --- a/src/soc/amd/stoneyridge/include/soc/northbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h @@ -23,16 +23,16 @@ /* D18F0 - HT Configuration Registers */ #define D18F0_NODE_ID 0x60 #define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */ -# define CPU_CNT_MASK 0x1f /* CpuCnt + 1 = no. CPUs */ +#define CPU_CNT_MASK 0x1f /* CpuCnt + 1 = no. CPUs */
/* D18F1 - Address Map Registers */
/* MMIO base and limit */ #define D18F1_MMIO_BASE0_LO 0x80 -# define MMIO_WE (1 << 1) -# define MMIO_RE (1 << 0) +#define MMIO_WE BIT(1) +#define MMIO_RE BIT(0) #define D18F1_MMIO_LIMIT0_LO 0x84 -# define MMIO_NP (1 << 7) +#define MMIO_NP BIT(7) #define D18F1_MMIO_BASELIM0_HI 0x180 #define D18F1_MMIO_BASE8_LO 0x1a0 #define D18F1_MMIO_LIMIT8_LO 0x1a4 @@ -48,17 +48,17 @@ - 8 * sizeof(uint32_t))) /* I/O base and limit */ #define D18F1_IO_BASE0 0xc0 -# define IO_WE (1 << 1) -# define IO_RE (1 << 0) +#define IO_WE BIT(1) +#define IO_RE BIT(0) #define D18F1_IO_LIMIT0 0xc4 #define NB_IO_BASE(reg) ((reg) * 2 * sizeof(uint32_t) + D18F1_IO_BASE0) #define NB_IO_LIMIT(reg) (NB_IO_BASE(reg) + sizeof(uint32_t))
#define D18F1_DRAM_HOLE 0xf0 -# define DRAM_HOIST_VALID (1 << 1) -# define DRAM_HOLE_VALID (1 << 0) +#define DRAM_HOIST_VALID BIT(1) +#define DRAM_HOLE_VALID BIT(0) #define D18F1_VGAEN 0xf4 -# define VGA_ADDR_ENABLE (1 << 0) +#define VGA_ADDR_ENABLE BIT(0)
enum { /* SMM handler area. */