Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
util/intelmetool: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I3a00db217ce7acd11f979e64bb5d417a8bfc8717
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
M util/intelmetool/me.c
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/util/intelmetool/me.c b/util/intelmetool/me.c
index ee2b46a..e9aa510 100644
--- a/util/intelmetool/me.c
+++ b/util/intelmetool/me.c
@@ -574,7 +574,7 @@
uint32_t intel_mei_setup(struct pci_dev *dev)
{
struct mei_csr host;
- uint32_t reg32;
+ uint16_t reg16;
uint32_t pagerounded;

mei_base_address = dev->base_addr[0] & ~0xf;
@@ -588,9 +588,9 @@
}

/* Ensure Memory and Bus Master bits are set */
- reg32 = pci_read_long(dev, PCI_COMMAND);
- reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_write_long(dev, PCI_COMMAND, reg32);
+ reg16 = pci_read_word(dev, PCI_COMMAND);
+ reg16 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_write_word(dev, PCI_COMMAND, reg16);

/* Clean up status for next message */
read_host_csr(&host);

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3a00db217ce7acd11f979e64bb5d417a8bfc8717
Gerrit-Change-Number: 40790
Gerrit-PatchSet: 2
Gerrit-Owner: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Christian Walter <christian.walter@9elements.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged