Arthur Heymans has uploaded this change for review.

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soc/intel/xeon-sp: Hook up public FSP bin and headers

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I778d3535c273dff653330518653bdefcb45e66f4
---
M src/soc/intel/xeon_sp/spr/Kconfig
M src/soc/intel/xeon_sp/spr/Makefile.mk
M src/soc/intel/xeon_sp/spr/romstage.c
3 files changed, 7 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/80360/1
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index bb88bec..c350825 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -13,6 +13,7 @@
select SOC_INTEL_CSE_SERVER_SKU
select XEON_SP_COMMON_BASE
select HAVE_IOAT_DOMAINS
+ select HAVE_INTEL_FSP_REPO
help
Intel Sapphire Rapids-SP support

@@ -23,9 +24,10 @@
default "soc/intel/xeon_sp/spr/chipset.cb"

config FSP_HEADER_PATH
- string "Location of FSP headers"
- depends on MAINBOARD_USES_FSP2_0
- default "src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp"
+ default "3rdparty/fsp/EagleStreamFspBinPkg/Include"
+
+config FSP_FD_PATH
+ default "3rdparty/fsp/EagleStreamFspBinPkg/Fsp.fd"

config MAX_CPUS
int
diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk
index 659e366..5cc3e2d 100644
--- a/src/soc/intel/xeon_sp/spr/Makefile.mk
+++ b/src/soc/intel/xeon_sp/spr/Makefile.mk
@@ -17,5 +17,6 @@
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr
+CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp

endif ## CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP
diff --git a/src/soc/intel/xeon_sp/spr/romstage.c b/src/soc/intel/xeon_sp/spr/romstage.c
index 4cce21f..ab8147f 100644
--- a/src/soc/intel/xeon_sp/spr/romstage.c
+++ b/src/soc/intel/xeon_sp/spr/romstage.c
@@ -20,6 +20,7 @@
#include <string.h>
#include <soc/soc_util.h>
#include <soc/ddr.h>
+#include <IioPcieConfigUpd.h>

#include "chip.h"


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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I778d3535c273dff653330518653bdefcb45e66f4
Gerrit-Change-Number: 80360
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-MessageType: newchange