Angel Pons has uploaded this change for review.

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sb/intel/lynxpoint/lpc.c: Relocate lock bit write

This lock bit can be set later, and should also be set for Lynxpoint-H.

Change-Id: I5c32127f2b4cfdfeb0e30a64e5bdda89958933cb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/lynxpoint/lpc.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/47036/1

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 6b47b8a..10e498a 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -364,9 +364,6 @@
 	if (RCBA32(FD) & PCH_DISABLE_ADSPD)
 		RCBA32_OR(0x2b1c, (1 << 29));
 
-	/* Lock */
-	RCBA32_OR(0x3a6c, 0x00000001);
-
 	/* Set RCBA 0x33D4 after other setup */
 	RCBA32_OR(0x33d4, 0x2fff2fb1);
 
@@ -772,6 +769,9 @@
 {
 	spi_finalize_ops();
 
+	/* Lock */
+	RCBA32_OR(0x3a6c, 0x00000001);
+
 	if (acpi_is_wakeup_s3() || CONFIG(INTEL_CHIPSET_LOCKDOWN))
 		apm_control(APM_CNT_FINALIZE);
 }

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