Attention is currently required from: V Sowmya, Rizwan Qureshi, Balaji Manigandan, Krishna P Bhat D, Usha P.

Usha P uploaded patch set #4 to this change.

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mb/intel/adlrvp: Set half_populated true for ADL-N

Alder Lake N has single memory controller with 64-bit bus width. Alder
Lake common meminit block driver considers bus width to be 128-bit and
populates the meminit data accordingly. By setting half_populated to
true, only the bottom half is populated.

Ideally, half_populated is used in platforms with multiple channels to
enable only one half of the channel. Alder Lake N has single channel,
and it would require for new structures to be defined in meminit block
driver for LPx memory configurations. In order to avoid adding new
structures, set half_populated to true. This has the same effect as
having single channel with 64-bit width.

Signed-off-by: Usha P <>
Change-Id: I2ecc3018a1ab039990ba47898ff0e0e2ede695cc
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
1 file changed, 6 insertions(+), 1 deletion(-)

git pull ssh:// refs/changes/13/62913/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2ecc3018a1ab039990ba47898ff0e0e2ede695cc
Gerrit-Change-Number: 62913
Gerrit-PatchSet: 4
Gerrit-Owner: Usha P <>
Gerrit-Reviewer: Balaji Manigandan <>
Gerrit-Reviewer: Krishna P Bhat D <>
Gerrit-Reviewer: Rizwan Qureshi <>
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