Sumeet R Pawnikar uploaded patch set #2 to this change.

View Change

[TEST] soc/intel/cannonlake: Disable PCH thermal sensor check during S0ix

This disables PCH thermal sensor check during system entry in S0ix state.

BUG=133345634
BRANCH=None
TEST=Verified S0ix entry with Thermal sensor disabled.

Change-Id: I298079e91bfea87ba02a8a32a622f2b0bbfc31a6
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
---
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/include/soc/pmc.h
2 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/33292/2

To view, visit change 33292. To unsubscribe, or for help writing mail filters, visit settings.