Rizwan Qureshi has uploaded this change for review.

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soc/intel/cannonlake: Add support for calling microcode update API

Add support for updating MCU. Use the fw_update API provided
by the soc/intel/common/basecode/fw_update. Also implement
the reboot function required by the API.

BUG=NA
BRANCH=NA
TEST=Build and boot hatch. Also test the ucode update flow with
supporting changes in hatch mainboard.

Change-Id: I881cc09ca00829437aa297f5a49acd3e48df4abf
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/Makefile.inc
A src/soc/intel/cannonlake/ucode_update.c
3 files changed, 56 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/33938/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 37e42f3..05a2e41 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -109,6 +109,8 @@
select DISPLAY_FSP_VERSION_INFO
select FSP_T_XIP if FSP_CAR
select HECI_DISABLE_USING_SMM if !SOC_INTEL_COFFEELAKE && !SOC_INTEL_WHISKEYLAKE && !SOC_INTEL_COMETLAKE
+ select SOC_INTEL_COMMON_BASECODE
+ select TOP_SWAP_BASED_VBOOT_UCODE_UPDATE

config DCACHE_RAM_BASE
default 0xfef00000
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 8a4a8b7..e3351ae 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -56,6 +56,7 @@
ramstage-y += uart.c
ramstage-y += vr_config.c
ramstage-y += sd.c
+ramstage-$(CONFIG_TOP_SWAP_BASED_VBOOT_UCODE_UPDATE) += ucode_update.c

smm-y += elog.c
smm-y += p2sb.c
diff --git a/src/soc/intel/cannonlake/ucode_update.c b/src/soc/intel/cannonlake/ucode_update.c
new file mode 100644
index 0000000..b657e48
--- /dev/null
+++ b/src/soc/intel/cannonlake/ucode_update.c
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016-2018 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <halt.h>
+#include <intelbasecode/ucode_update.h>
+#include <reset.h>
+#include <bootstate.h>
+#include <security/vboot/vboot_common.h>
+#include <security/vboot/vbnv.h>
+
+static void update_ucode(void *unused)
+{
+ if (CONFIG(TOP_SWAP_BASED_VBOOT_UCODE_UPDATE)) {
+ if (check_and_update_ucode()) {
+ /* Update failed */
+ if (CONFIG(VBOOT)) {
+ set_recovery_mode_into_vbnv(0x7f);
+ vboot_reboot();
+ } else {
+ die ("Failed to update microcode\n");
+ }
+ }
+ }
+}
+
+void ucode_update_reboot(void)
+{
+ if (CONFIG(VBOOT))
+ vboot_reboot();
+ else
+ do_board_reset();
+ halt();
+}
+
+int ucode_update_rec_mode_enabled(void)
+{
+ return vboot_recovery_mode_enabled();
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, update_ucode, NULL);

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I881cc09ca00829437aa297f5a49acd3e48df4abf
Gerrit-Change-Number: 33938
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi@intel.com>
Gerrit-MessageType: newchange