Patrick Georgi merged this change.
soc/intel/cannonlake/acpi: Add board level s0ix call back
Add board level s0ix call back. Since some driver doesn't
care _ON/_OFF method. Add a control method for s0ix usage.
BUG=b:129177593
TEST=NA
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I404f388b19355ae89b36d1fb07f9fb4f97eb3b2d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
M src/soc/intel/cannonlake/acpi/lpit.asl
1 file changed, 10 insertions(+), 0 deletions(-)
diff --git a/src/soc/intel/cannonlake/acpi/lpit.asl b/src/soc/intel/cannonlake/acpi/lpit.asl
index 8515806..93bce26 100644
--- a/src/soc/intel/cannonlake/acpi/lpit.asl
+++ b/src/soc/intel/cannonlake/acpi/lpit.asl
@@ -14,6 +14,8 @@
* GNU General Public License for more details.
*/
+External(\_SB.MS0X, MethodObj)
+
scope(\_SB)
{
Device(LPID) {
@@ -62,12 +64,20 @@
*/
If(Arg2 == 5) {
\_SB.PCI0.LPCB.EC0.S0IX(1)
+ /* provide board level s0ix hook */
+ If (CondRefOf (\_SB.MS0X)) {
+ \_SB.MS0X(1)
+ }
}
/*
* Function 6.
*/
If(Arg2 == 6) {
\_SB.PCI0.LPCB.EC0.S0IX(0)
+ /* provide board level s0ix hook */
+ If (CondRefOf (\_SB.MS0X)) {
+ \_SB.MS0X(0)
+ }
}
}
Return(Buffer(One) {0x00})
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