Patch Set 4: Code-Review+2

Patch Set 4:

Patch Set 4: Code-Review-1

I'm not sure if we really want to enable CSE/ME/... by default

To answer your question, please look at this code https://github.com/coreboot/coreboot/blob/master/src/soc/intel/apollolake/chip.c#L792

Like every platform, coreboot will ensure to make CSE bus function disable that means prior to boot to OS (after EOP is done), CSE will not visible on bus irrespective of being listen in devicetree.cb. hence your concern is already been taken care that CSE shouldn't be default enable.

Hope this help to clarify things ?

if yes, can you please reconsider your vote?

Got it, thank you!

Thanks a lot for review

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Gerrit-Project: coreboot
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Gerrit-Change-Id: I97d221ae52b4b03ecd859d708847ad77fe4bf465
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