Angel Pons has uploaded this change for review.

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sb/intel/ibexpeak: Add define for PRSTS register

Change-Id: Ia9a6b0c7f2a07796f850acd2349067ba5e5eb735
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/ibexpeak/pch.h
2 files changed, 6 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/35453/1

diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index a6bbe64..3e1f4a4 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -266,10 +266,11 @@
 	outl(reg32, pmbase + 0x04);
 
 	/* Clear magic status bits to prevent unexpected wake */
-	reg32 = RCBA32(0x3310);
-	reg32 |= (1 << 4)|(1 << 5)|(1 << 0);
-	RCBA32(0x3310) = reg32;
+	reg32 = RCBA32(PRSTS);
+	reg32 |= (1 << 5) | (1 << 4) | (1 << 0);
+	RCBA32(PRSTS) = reg32;
 
+	/* FIXME: Does this even exist? */
 	reg32 = RCBA32(0x3f02);
 	reg32 &= ~0xf;
 	RCBA32(0x3f02) = reg32;
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index ee0f9ad..e7cc9d2 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -352,6 +352,8 @@
 #define SOFT_RESET_CTRL 0x38f4
 #define SOFT_RESET_DATA 0x38f8
 
+#define PRSTS		0x3310
+
 #define DIR_ROUTE(x,a,b,c,d) \
   RCBA32(x) = (((d) << DIR_IDR) | ((c) << DIR_ICR) | \
                ((b) << DIR_IBR) | ((a) << DIR_IAR))

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