cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE

Implementations with LAPIC_MONOTONIC_TIMER typically will
not have tsc_freq_mhz() implemented and default to UNKNOWN_TSC_RATE.

Implementations of tsc_freq_mhz() already cache the value
in .bss.

Note that for boards with UNKNOWN_TSC_RATE=y, each stage will have
a slow run of calibrate_tsc_with_pit(). This is easy enough
to fix with followup implementation of tsc_freq_mhz() for
the cpu.

For mb/via/epia-m850 romstage additionally changes from UDELAY_IO
to UDELAY_TSC.

Change-Id: I1690cb80295d6b006b75ed69edea28899b674b68
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/arch/x86/cpu.c
M src/arch/x86/timestamp.c
M src/cpu/intel/fsp_model_406dx/Kconfig
M src/cpu/intel/haswell/Kconfig
M src/cpu/intel/model_1067x/Kconfig
M src/cpu/intel/model_106cx/Kconfig
M src/cpu/intel/model_2065x/Kconfig
M src/cpu/intel/model_206ax/Kconfig
M src/cpu/intel/model_6ex/Kconfig
M src/cpu/intel/model_6fx/Kconfig
M src/cpu/intel/slot_1/Kconfig
M src/cpu/intel/socket_mPGA604/Kconfig
M src/cpu/qemu-x86/Kconfig
M src/cpu/via/nano/Kconfig
M src/cpu/x86/Kconfig
M src/cpu/x86/tsc/Makefile.inc
M src/cpu/x86/tsc/delay_tsc.c
M src/drivers/pc80/pc/i8254.c
M src/include/cpu/x86/tsc.h
M src/northbridge/via/vx900/Makefile.inc
M src/soc/amd/picasso/Kconfig
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/baytrail/Kconfig
M src/soc/intel/braswell/Kconfig
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/fsp_baytrail/Kconfig
M src/soc/intel/fsp_broadwell_de/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/quark/Kconfig
M src/soc/intel/skylake/Kconfig
32 files changed, 43 insertions(+), 54 deletions(-)