Srinidhi N Kaushik has uploaded this change for review.
mb/tglrvp: Update iDisp UPD settings.
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I8d3da32d05d12944dc527e347f8afcc634d772cb
---
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
2 files changed, 0 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/40265/1
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 6cef4f8..69b5fb9 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -115,12 +115,6 @@
register "PchHdaAudioLinkSspEnable[1]" = "0"
register "PchHdaAudioLinkSspEnable[2]" = "1"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
- # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T
- register "PchHdaIDispLinkTmode" = "2"
- # iDisp-Link Freq 4: 96MHz, 3: 48MHz.
- register "PchHdaIDispLinkFrequency" = "4"
- # Not disconnected/enumerable
- register "PchHdaIDispCodecDisconnect" = "0"
device domain 0 on
#From EDS(575683)
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index c5cc800..d7990b5 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -111,12 +111,6 @@
register "PchHdaAudioLinkSspEnable[1]" = "0"
register "PchHdaAudioLinkSspEnable[2]" = "1"
register "PchHdaAudioLinkSndwEnable[0]" = "1"
- # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T
- register "PchHdaIDispLinkTmode" = "2"
- # iDisp-Link Freq 4: 96MHz, 3: 48MHz.
- register "PchHdaIDispLinkFrequency" = "4"
- # Not disconnected/enumerable
- register "PchHdaIDispCodecDisconnect" = "0"
device domain 0 on
#From EDS(575683)
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