[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variant/nocturne: add EC_SYNC_GPIO

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35174 )

Change subject: mb/google/poppy/variant/nocturne: add EC_SYNC_GPIO
......................................................................

mb/google/poppy/variant/nocturne: add EC_SYNC_GPIO

Setup EC_PCH_ARCORE_INT_L, tied to GPP_D17, and define as EC_SYNC_GPIO..

- change GPP_D17 definition to PAD_CFG_GPI_APIC_INVERT as
   EC_PCH_ARCORE_INT_L is active low

- add EC_SYNC_GPIO to the group of chromeos_gpios for use by depthcharge

BUG=b:139384979
BRANCH=none
TEST="emerge_nocturne coreboot depthcharge chromeos-bootimage",
flash & boot nocturne in dev mode, verify that volume up and down
buttons work in the dev screen and that the device boots properly into
the kernel.

Change-Id: Ia43c622710fde8686c60b836fb8318931d79eb61
Signed-off-by: Nick Vaccaro 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35174
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/poppy/chromeos.c
M src/mainboard/google/poppy/variants/nocturne/gpio.c
M src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
3 files changed, 8 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/poppy/chromeos.c b/src/mainboard/google/poppy/chromeos.c
index 84b0031..23e575d 100644
--- a/src/mainboard/google/poppy/chromeos.c
+++ b/src/mainboard/google/poppy/chromeos.c
@@ -32,6 +32,9 @@
    	{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
    	{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW),
    	 "EC in RW"},
+#ifdef EC_SYNC_GPIO
+		{EC_SYNC_GPIO, ACTIVE_LOW, gpio_get(EC_SYNC_GPIO), "EC sync gpio"},
+#endif
    };
    lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index c62317a..a4ea3c3 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -196,7 +196,7 @@
    /* D16 : ISH_UART0_CTS# ==> RCAM_RST_L */
    PAD_CFG_GPO(GPP_D16, 0, DEEP),
    /* D17 : DMIC_CLK1 ==> EC_PCH_ARCORE_INT_L */
-	PAD_CFG_GPI_APIC(GPP_D17, NONE, PLTRST),
+	PAD_CFG_GPI_APIC_INVERT(GPP_D17, NONE, PLTRST),
    /* D18 : DMIC_DATA1 ==> TP131 */
    PAD_CFG_NC(GPP_D18),
    /* D19 : DMIC_CLK0 ==> PCH_DMIC_CLK_OUT */
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
index fb7ad1a..45bb76b 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
@@ -34,9 +34,12 @@
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK

-/* EC sync irq is GPP_D12 */
+/* EC sync irq is tied to GPP_D17 */
 #define EC_SYNC_IRQ		GPP_D17_IRQ

+/* EC sync gpio */
+#define EC_SYNC_GPIO		GPP_D17
+
 /* eSPI virtual wire reporting */
 #define EC_SCI_GPI		GPE0_ESPI