Patrick Georgi submitted this change.
soc/intel/jasperlake: Correct SaGv mapping
Jasper Lake support 3 Memory train frequencies low. mid and high.
Update the SaGv configuration accordingly.
Change-Id: I366de1ea7cf41c56b2954b8032c69bfba81058e2
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
---
M src/soc/intel/jasperlake/chip.h
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 5a87a91..4410de9 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -60,16 +60,15 @@
/* TCC activation offset */
uint32_t tcc_offset;
- /* System Agent dynamic frequency support. Only effects ULX/ULT CPUs.
- * When enabled memory will be training at two different frequencies.
- * 0:Disabled, 1:FixedPoint0, 2:FixedPoint1, 3:FixedPoint2,
- * 4:FixedPoint3, 5:Enabled */
+ /* System Agent dynamic frequency support.
+ * When enabled memory will be training at different frequencies.
+ * 0:Disabled, 1:FixedPoint0(low), 2:FixedPoint1(mid), 3:FixedPoint2
+ * (high), 4:Enabled */
enum {
SaGv_Disabled,
SaGv_FixedPoint0,
SaGv_FixedPoint1,
SaGv_FixedPoint2,
- SaGv_FixedPoint3,
SaGv_Enabled,
} SaGv;
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