Angel Pons has uploaded this change for review.

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soc/intel/broadwell: Include EC and IRQ links ACPI early

Other southbridges such as Lynx Point do it. This eases merging later.

Change-Id: I10196bbc44ce859c2747755845378351f45944ae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/soc/intel/broadwell/pch/acpi/lpc.asl
1 file changed, 4 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/46766/1

diff --git a/src/soc/intel/broadwell/pch/acpi/lpc.asl b/src/soc/intel/broadwell/pch/acpi/lpc.asl
index 01e1beb..0af85e6 100644
--- a/src/soc/intel/broadwell/pch/acpi/lpc.asl
+++ b/src/soc/intel/broadwell/pch/acpi/lpc.asl
@@ -31,6 +31,10 @@
 		IOD1,	8,
 	}
 
+	#include <southbridge/intel/common/acpi/irqlinks.asl>
+
+	#include "acpi/ec.asl"
+
 	Device (DMAC)	// DMA Controller
 	{
 		Name (_HID, EISAID("PNP0200"))
@@ -180,7 +184,5 @@
 	}
 
 	#include "gpio.asl"
-	#include <southbridge/intel/common/acpi/irqlinks.asl>
-	#include "acpi/ec.asl"
 	#include "acpi/superio.asl"
 }

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