V Sowmya has uploaded this change for review.

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mb/intel/adlrvp: Add PMC.MUX.CONx device configuration for adlrvp

This patch adds the PMC MUX and CONx devices for adlrvp. Device
specific method contains the port and orientation details used
to configure the mux.

BUG=:b:170607415
TEST=Built and booted adlrvp. Verified the PMC.MUX CONx objects
in SSDT tables.

Change-Id: I3b5bb73991feb99577c16fea00c381dd0f855769
Signed-off-by: V Sowmya <v.sowmya@intel.com>
---
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
2 files changed, 30 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/47289/1

diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 97b4bf7..ee021fe 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -9,6 +9,7 @@
 	select DRIVERS_I2C_HID
 	select DRIVERS_I2C_GENERIC
 	select DRIVERS_INTEL_SOUNDWIRE
+	select DRIVERS_INTEL_PMC
 	select DRIVERS_USB_ACPI
 	select DRIVERS_SPI_ACPI
 	select SOC_INTEL_ALDERLAKE
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
index 44c324b..5e0ded5 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
@@ -252,9 +252,36 @@
 		device pci 1e.1 off end # UART1
 		device pci 1e.2 on  end # GSPI0
 		device pci 1e.3 off end # GSPI1
-		device pci 1f.0 on  end # eSPI
+		device pci 1f.0 on
+			chip ec/google/chromeec
+				device pnp 0c09.0 on end
+				use conn0 as mux_conn[0]
+				use conn1 as mux_conn[1]
+			end
+		end # eSPI
 		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 hidden  end # PMC
+		device pci 1f.2 hidden
+			# The pmc_mux chip driver is a placeholder for the
+			# PMC.MUX device in the ACPI hierarchy.
+			chip drivers/intel/pmc_mux
+				device generic 0 on
+					chip drivers/intel/pmc_mux/conn
+						register "usb2_port_number" = "1"
+						register "usb3_port_number" = "1"
+						# SBU is fixed, HSL follows CC
+						register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+						device generic 0 alias conn0 on end
+					end
+					chip drivers/intel/pmc_mux/conn
+						register "usb2_port_number" = "2"
+						register "usb3_port_number" = "2"
+						# SBU is fixed, HSL follows CC
+						register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+						device generic 1 alias conn1 on end
+					end
+				end
+			end
+		end # PMC
 		device pci 1f.3 on
 			chip drivers/intel/soundwire
 				device generic 0 on

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