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1 comment:

• File src/soc/intel/alderlake/fsp_params.c:

  • Patch Set #9, Line 842: /*

    Isn't a board design specific topic ? Should it be handled in src/mainboard/... […]

    I guess a board could use any GPIO for it, but currently, coreboot leaves FSP using pins that can't ever work - surely the default should be changed to what Intel recommend?

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