Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12642
-gerrit
commit 722d03777ba72923407e124e0c868c9bcc88d733 Author: Martin Roth martinroth@google.com Date: Fri Dec 4 08:42:36 2015 -0700
MAINTAINERS: Designate Intel maintainer for FSP 1.0 Ivy Bridge
After several internal discussions, teams at Intel with stakes in coreboot have decided to each assign one or more maintainers. These maintainers can be expected to provide a point of contact for assistance with technical (code-related) issues, testing on real hardware, and making sure that their FSP-related areas continue to function with upstream coreboot.
They understand that the inclusion of their information in the MAINTAINERS file does not give them any extra power over their areas. At the same time, nobody expects any community process to change. The one expectation is that reasonable efforts be made to contact these maintainers when making fundamental changes to their areas, or when discussing code removal.
Change-Id: I33d95db12d9e394360a207c8fbcfbc15723115c6 Signed-off-by: Martin Roth martinroth@google.com --- MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS index 09f0a38..8c0f7a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -131,6 +131,18 @@ M: Stefan Reinauer stefan.reinauer@coreboot.org S: Supported F: src/mainboard/google/panther/
+INTEL FSP IVYBRIDGE/PANTHERPOINT/CAVECREEK & CRBs +M: York Yang york.yang@intel.com +S: Supported +F: src/cpu/intel/fsp_model_206ax/ +F: src/northbridge/intel/fsp_sandybridge/ +F: src/southbridge/intel/fsp_bd82x6x/ +F: src/southbridge/intel/fsp_i89xx/ +F: src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x +F: src/vendorcode/intel/fsp1_0/ivybridge_i89xx +F: src/mainboard/intel/cougar_canyon2/ +F: src/mainboard/intel/stargo2/ + INTEL MINNOWBOARD MAX MAINBOARD M: Huang Jin huang.jin@intel.com M: York Yang york.yang@intel.com