[coreboot-gerrit] Change in ...coreboot[master]: soc/amd/stoneyridge: Correct bugs in lpc.c

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32551 )

Change subject: soc/amd/stoneyridge: Correct bugs in lpc.c
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Patch Set 1:

SPI prefetch is set up in bootblock already.  My guess is we _probably_ haven't seen any side effects -- the EC is the only device on LPC and it may not be trying to take any actions that would be a problem.  I don't believe an OS would reinitialize these items.