7 comments:
File src/mainboard/gigabyte/ga-panther-point/Kconfig:
select ARCH_X86
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select INTEL_INT15
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SERIRQ_CONTINUOUS_MODE
select SOUTHBRIDGE_INTEL_BD82X6X
select USE_NATIVE_RAMINIT
select SUPERIO_ITE_IT8728F
select MAINBOARD_HAS_LIBGFXINIT
select INTEL_GMA_HAVE_VBT
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT
Doesn't look like the original selection and is causing the build failure.
onfig VGA_BIOS_ID
string
default "8086,0162"
config VGA_BIOS_FILE
string
default "pci8086,0162.rom"
The depends on the CPU put into the socket, and I guess we can't predict that.
File src/mainboard/gigabyte/ga-panther-point/dsdt.asl:
Changes here seem unrelated to the variant setup?
File src/mainboard/gigabyte/ga-panther-point/variants/ga-b75m-d3h/include/variant/acpi/superio.asl:
Still the same file for both boards. And...
Patch Set #4, Line 19: #define SIO_ENABLE_PS2M // Enable PS/2 Mouse
...it seems these definitions are meaningless for the selected chip
drivers. Maybe stub the whole file out in a follow-up commit.
File src/mainboard/gigabyte/ga-panther-point/variants/ga-b75m-d3h/include/variant/hda_verb.h:
Belongs below the license header.
File src/mainboard/gigabyte/ga-panther-point/variants/ga-b75m-d3h/include/variant/mainboard_init.h:
No code in .h files, please. You can add it as `ga-b75m-d3h/mainboard.c` and
hook it up in the `Makefile.inc`.
NB. These registers should already be set by southbridge code.
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