V Sowmya uploaded patch set #2 to this change.

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mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllers

This patch enables TCSS xDCI, TBT PCIe root ports and DMA controllers
for ADLRVP.

BUG=b:170607415
TEST=Built and booted on ADLRVP.

Change-Id: Iabd6cc7c589d1c20cde9d66c0a63e2cf16316b33
Signed-off-by: V Sowmya <v.sowmya@intel.com>
---
M src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
1 file changed, 7 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/47288/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iabd6cc7c589d1c20cde9d66c0a63e2cf16316b33
Gerrit-Change-Number: 47288
Gerrit-PatchSet: 2
Gerrit-Owner: V Sowmya <v.sowmya@intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Sooraj Govindan <sooraj.govindan@intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-MessageType: newpatchset