V Sowmya has uploaded this change for review.
soc/intel/cannonlake: Adding Kconfig option to disable the eMMC controller
This patch adds an Kconfig option to exclude the EMMC interface ACPI
objects for cannonlake based platforms.
BUG=b:120914069
BRANCH=none
TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot.
Change-Id: I90c0230e845c8d02386b50b1100faf7064ecf8f6
Signed-off-by: V Sowmya <v.sowmya@intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/acpi/scs.asl
2 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30614/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 9e007b6..121909a 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -208,6 +208,13 @@
default 4 if SOC_INTEL_CANNONLAKE_PCH_H
default 6
+config EXCLUDE_EMMC_INTERFACE
+ bool
+ default n
+ help
+ If you set this option to n, it will not use EMMC controller.
+
+
# Clock divider parameters for 115200 baud rate
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
hex
diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl
index 896fd77..29939be 100644
--- a/src/soc/intel/cannonlake/acpi/scs.asl
+++ b/src/soc/intel/cannonlake/acpi/scs.asl
@@ -27,6 +27,7 @@
^PCRA (Arg0, 0x4820, 0x0)
}
+#if !IS_ENABLED(CONFIG_EXCLUDE_EMMC_INTERFACE)
/* EMMC */
Device(PEMC) {
Name(_ADR, 0x001A0000)
@@ -77,6 +78,7 @@
}
}
}
+#endif
/* SD CARD */
Device (SDXC)
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