Do you have the lingcod gpio vs volteer gpio table? I would like to double check your GPIO setting.
14 comments:
File src/mainboard/google/volteer/variants/lingcod/gpio.c:
Patch Set #9, Line 8: /* Leave eSPI pins untouched from default settings */
remove this.
Patch Set #9, Line 9: gpio_table
rename to override_gpio_table to align with the other variant.
/* A0 thru A6 come configured out of reset, do not touch */
/* A0 : ESPI_IO0 ==> ESPI_IO_0 */
/* A1 : ESPI_IO1 ==> ESPI_IO_1 */
/* A2 : ESPI_IO2 ==> ESPI_IO_2 */
/* A3 : ESPI_IO3 ==> ESPI_IO_3 */
/* A4 : ESPI_CS# ==> ESPI_CS_L */
/* A5 : ESPI_CLK ==> ESPI_CLK */
/* A6 : ESPI_RESET# ==> NC(TP764) */
remove this. This is same as baseboard.
/* A18 : DDSP_HPDB ==> NOT USED */
PAD_NC(GPP_A18, NONE),
remove this. This is same as baseboard.
/* A21 : DDPC_CTRCLK ==> NOT USED */
PAD_NC(GPP_A21, NONE),
remove this. This is same as baseboard.
/* B19 : GSPI1_CS0# ==> NOT USED */
PAD_NC(GPP_B19, NONE),
/* B20 : GSPI1_CLK ==> NOT USED */
PAD_NC(GPP_B20, NONE),
/* B21 : GSPI1_MISO ==> NOT USED */
PAD_NC(GPP_B21, NONE),
remove this. This is same as baseboard.
/* C7 : SML1DATA ==> NOT USED */
PAD_NC(GPP_C7, NONE),
remove this. This is same as baseboard.
/* C11 : UART0_CTS# ==> NOT USED */
PAD_NC(GPP_C11, NONE),
remove this. This is same as baseboard.
/* C20 : UART2_RXD ==> NOT USED */
PAD_NC(GPP_C20, NONE),
remove this. This is same as baseboard.
/* D5 : SRCCLKREQ0$ ==> SSD_CLKREQ_ODL */
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
remove this. This is same as baseboard.
/* F6 : CNV_PA_BLANKING ==> NC */
PAD_NC(GPP_F6, NONE),
remove this. This is same as baseboard.
/* H8 : I2C4_SDA ==> NOT USED */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NOT USED */
PAD_NC(GPP_H9, NONE),
remove this. This is same as baseboard.
Patch Set #9, Line 198: gpio_table
rename to override_gpio_table to align with the other variant.
Patch Set #9, Line 199: gpio_table
rename to override_gpio_table to align with the other variant.
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