Angel Pons would like Felix Singer, V Sowmya, Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Arthur Heymans, Michael Niewöhner and Patrick Rudolph to review this change.

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soc/intel/skylake: Drop unreferenced devicetree settings

No mainboard uses these settings, nor does SoC code. Drop them.

Change-Id: I76aa2327d440394a9176c023bc95fb34e713741e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/soc/intel/skylake/chip.h
1 file changed, 0 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/48571/1

diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 58d172f..bc37f1a 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -94,17 +94,6 @@
 	int ignore_vtd;
 
 	/*
-	 * The following fields come from FspUpdVpd.h.
-	 * These are configuration values that are passed to FSP during
-	 * MemoryInit.
-	 */
-	u64 PlatformMemorySize;
-	u8 SmramMask;
-	u8 MrcFastBoot;
-	u32 TsegSize;
-	u16 MmioSize;
-
-	/*
 	 * DDR Frequency Limit
 	 * 0(Auto), 1067, 1333, 1600, 1867, 2133, 2400
 	 */
@@ -314,8 +303,6 @@
 	u8 HeciTimeouts;
 	u8 HsioMessaging;
 
-	/* Gfx related */
-	u8 IgdDvmt50PreAlloc;
 	enum {
 		Display_iGFX,
 		Display_PEG,
@@ -334,7 +321,6 @@
 	 */
 	u32 LogoPtr;
 	u32 LogoSize;
-	u32 GraphicsConfigPtr;
 	u8 RtcLock;
 	/* GPIO IRQ Route  The valid values is 14 or 15*/
 	u8 GpioIrqSelect;

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