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3 comments:
File src/soc/intel/xeon_sp/chip_gen6.c:
unsigned int?
I think the resource API uses `int` everywhere for some reason. If anything, would be best to be consistent (if we're going to use `unsigned int` for resource index, let's do so everywhere).
Could the HOB behavior change? If so, mention the version? […]
I doubt it'll change. It doesn't make sense to rely on FSP for this kind of information anyway (see my comment below; coreboot usually controls what is enabled within this range).
Patch Set #53, Line 57: IORESOURCE_SUBTRACTIVE
Is this actually a subtractive resource? I think various platforms in coreboot get this wrong.
AIUI, this is a catch-all resource for the various things the southbridge/PCH can place in this range, e.g. LPC-forwarded fixed I/O ranges (e.g. 0x60/0x64, 0x62/0x66, 0x3f8, 0x2f8... It's the `LPC_EN` register on older platforms), CMOS access registers... I forget, the list is pretty long. But this is not at all subtractive decoding.
It's https://github.com/coreboot/coreboot/blob/main/src/southbridge/intel/lynxpoint/early_pch.c#L57 except for the generic decode ranges (those are handled separately as they can be anywhere in I/O space). (Note: I think Lynxpoint also does this wrong and reports this resource as subtractive).
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