Richard Spiegel has uploaded this change for review.
soc/amd/stoneyridge: Add merlinfalcon configuration
In preparation to add board padmelon, add config parameter for merlinfalcon
(SOC_AMD_MERLINFALCON_FP4) and modify makefile based on this config parameter.
BUG=b:none.
TEST=Tested later with padmelon board.
Change-Id: Id9f960b8f012c5a1cfd398611d6a51838493da27
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
---
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
2 files changed, 106 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/33621/1
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index ba82565..047379c 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -23,8 +23,14 @@
help
AMD Stoney Ridge FT4 support
-if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+config SOC_AMD_MERLINFALCON_FP4
+ bool
+ help
+ AMD Merlin Falcon FP4 support
+if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_MERLINFALCON_FP4
+
+if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_BOOTBLOCK_X86_32
@@ -71,6 +77,55 @@
select SSE2
select RTC
select SOC_AMD_PSP_SELECTABLE_SMU_FW
+endif
+
+if SOC_AMD_MERLINFALCON_FP4
+config CPU_SPECIFIC_OPTIONS
+ def_bool y
+ select ARCH_BOOTBLOCK_X86_32
+ select ARCH_VERSTAGE_X86_32
+ select ARCH_ROMSTAGE_X86_32
+ select ARCH_RAMSTAGE_X86_32
+ select X86_AMD_FIXED_MTRRS
+ select ACPI_AMD_HARDWARE_SLEEP_VALUES
+ select COLLECT_TIMESTAMPS_NO_TSC
+ select DRIVERS_I2C_DESIGNWARE
+ select GENERIC_GPIO_LIB
+ select GENERIC_UDELAY
+ select IOAPIC
+ select HAVE_USBDEBUG_OPTIONS
+ select HAVE_MONOTONIC_TIMER
+ select SPI_FLASH if HAVE_ACPI_RESUME
+ select TSC_SYNC_LFENCE
+ select COLLECT_TIMESTAMPS
+ select SOC_AMD_PI
+ select SOC_AMD_COMMON
+ select SOC_AMD_COMMON_BLOCK
+ select SOC_AMD_COMMON_BLOCK_IOMMU
+ select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
+ select SOC_AMD_COMMON_BLOCK_ACPI
+ select SOC_AMD_COMMON_BLOCK_LPC
+ select SOC_AMD_COMMON_BLOCK_PCI
+ select SOC_AMD_COMMON_BLOCK_HDA
+ select SOC_AMD_COMMON_BLOCK_SATA
+ select SOC_AMD_COMMON_BLOCK_PI
+ select SOC_AMD_COMMON_BLOCK_PSP
+ select SOC_AMD_COMMON_BLOCK_CAR
+ select SOC_AMD_COMMON_BLOCK_S3
+ select C_ENVIRONMENT_BOOTBLOCK
+ select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
+ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
+ select PARALLEL_MP
+ select PARALLEL_MP_AP_WORK
+ select HAVE_SMI_HANDLER
+ select SMM_TSEG
+ select POSTCAR_STAGE
+ select POSTCAR_CONSOLE
+ select SSE2
+ select RTC
+endif
config VBOOT
select VBOOT_SEPARATE_VERSTAGE
@@ -135,6 +190,7 @@
config VGA_BIOS_ID
string
+ default "1002,9874" if SOC_AMD_MERLINFALCON_FP4
default "1002,98e4"
help
The default VGA BIOS PCI vendor/device ID should be set to the
@@ -142,6 +198,7 @@
config VGA_BIOS_FILE
string
+ default "3rdparty/blobs/northbridge/amd/00660F01/VBIOS.bin" if SOC_AMD_MERLINFALCON_FP4
default "3rdparty/blobs/soc/amd/stoneyridge/VBIOS.bin"
config S3_VGA_ROM_RUN
@@ -190,6 +247,7 @@
config AMD_PUBKEY_FILE
string "AMD public Key"
+ default "3rdparty/blobs/soc/amd/merlinfalcon/PSP/AmdPubKeyMF.bin" if SOC_AMD_MERLINFALCON_FP4
default "3rdparty/blobs/soc/amd/stoneyridge/PSP/AmdPubKeyST.bin"
config STONEYRIDGE_SATA_MODE
@@ -386,4 +444,4 @@
return to S0. Otherwise the system will remain in S5 once power
is restored.
-endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
+endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_MERLINFALCON_FP4
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index babd878..76c4f09 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -27,7 +27,7 @@
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************
-ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+ifeq ($(CONFIG_SOC_AMD_MERLINFALCON_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/tsc
@@ -142,7 +142,11 @@
### 0
FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
+ifeq ($(CONFIG_SOC_AMD_MERLINFALCON_FP4),y)
+FIRMWARE_TYPE=MF
+else
FIRMWARE_TYPE=ST
+endif
###5
PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
@@ -214,7 +218,6 @@
OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware)
OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2)
-
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
@@ -232,6 +235,45 @@
$(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
$(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \
$(AMDFWTOOL)
+
+ifeq ($(CONFIG_SOC_AMD_MERLINFALCON_FP4),y)
+ rm -f $@
+ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
+ $(AMDFWTOOL) \
+ $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
+ $(OPT_STONEYRIDGE_GEC_FWM_FILE) \
+ $(OPT_AMD_PUBKEY_FILE) \
+ $(OPT_PSPBTLDR_FILE) \
+ $(OPT_SMUFWM_FILE) \
+ $(OPT_PSPRCVR_FILE) \
+ $(OPT_PUBSIGNEDKEY_FILE) \
+ $(OPT_PSPSCUREOS_FILE) \
+ $(OPT_PSPNVRAM_FILE) \
+ $(OPT_PSPSECUREDEBUG_FILE) \
+ $(OPT_PSPTRUSTLETS_FILE) \
+ $(OPT_TRUSTLETKEY_FILE) \
+ $(OPT_SMUFIRMWARE2_FILE) \
+ $(OPT_SMUSCS_FILE) \
+ $(OPT_AMD_PUBKEY_FILE) \
+ $(OPT_PSPBTLDR_FILE) \
+ $(OPT_SMUFWM_FILE) \
+ $(OPT_SMUFWM_FN_FILE) \
+ $(OPT_PSPRCVR_FILE) \
+ $(OPT_PUBSIGNEDKEY_FILE) \
+ $(OPT_PSPSCUREOS_FILE) \
+ $(OPT_PSPNVRAM_FILE) \
+ $(OPT_PSPSECUREDEBUG_FILE) \
+ $(OPT_PSPTRUSTLETS_FILE) \
+ $(OPT_TRUSTLETKEY_FILE) \
+ $(OPT_SMUFIRMWARE2_FILE) \
+ $(OPT_SMUFIRMWARE2_FN_FILE) \
+ $(OPT_SMUSCS_FILE) \
+ --flashsize $(CONFIG_ROM_SIZE) \
+ --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
+ --output $@
+endif
+
+ifeq ((CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
@@ -267,6 +309,7 @@
--flashsize $(CONFIG_ROM_SIZE) \
--location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
--output $@
+endif
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
PHONY+=add_amdfw
@@ -313,4 +356,4 @@
endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
-endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
+endif # ($(CONFIG_SOC_AMD_MERLINFALCON_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
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