Patrick Rudolph uploaded patch set #5 to this change.

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[WIP]nb/intel/sandybridge: Migrate MRC settings to devicetree

* Add more chip register to move PEI data to devicetree.cb.
* Set northbridge/southbridge and runtime detectable settings.
* Fill in values from devicetree.

This change is still a noop as the pei structure is overwritten with the
mainboard pei structure.

The followup commit will migrate to devicetree.cb.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Ic6d9f0fd6a2b792ac693d6016ed9ce44945c900c
---
M src/northbridge/intel/sandybridge/chip.h
M src/northbridge/intel/sandybridge/raminit_mrc.c
2 files changed, 131 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/32069/5

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic6d9f0fd6a2b792ac693d6016ed9ce44945c900c
Gerrit-Change-Number: 32069
Gerrit-PatchSet: 5
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset