Bora Guvendik has uploaded this change for review.

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mb/intel/tglrvp: Enable Pcie WWAN m.2

Change-Id: Ie9b7915062b2ef65d881d478e64322c0b8765614
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
---
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
4 files changed, 22 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/45828/1
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index ad7eabe..be3ba0f 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -20,7 +20,7 @@
register "SmbusEnable" = "1"

register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Type-C Port1
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN
+ register "usb2_ports[1]" = "USB2_PORT_EMPTY" # M.2 WWAN
register "usb2_ports[2]" = "USB2_PORT_MID(OC3)" # M.2 Bluetooth
register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port1
register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-C Port2
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
index 49946c8..b63ee98 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
@@ -94,6 +94,15 @@
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* HPD_1 */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), /* DDP_1_CTRCLK */
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1), /* DDP_1_CTRDATA */
+
+ /* WWAN */
+ PAD_CFG_GPO(GPP_H23, 1, PLTRST), /* WWAN_PWREN */
+ PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* CLK SRC 2 */
+ PAD_CFG_GPI_SCI(GPP_C9, NONE, DEEP, LEVEL, INVERT), /* WWAN_WAKE_N */
+ PAD_CFG_GPO(GPP_C11, 1, PLTRST), /* FULL_CARD_POWER_OFF_N */
+ PAD_CFG_GPO(GPP_C10, 1, PLTRST), /* WWAN_RST_N */
+ PAD_CFG_GPO(GPP_B17, 1, PLTRST), /* WWAN_PERST_N */
+ PAD_CFG_GPO(GPP_D15, 1, PLTRST), /* WWAN_DISABLE_N */
};

const struct pad_config *variant_gpio_table(size_t *num)
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 3e2b342..1ba6bd6 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -20,9 +20,9 @@
register "SmbusEnable" = "1"

register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN
- register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A port1
- register "usb2_ports[3]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A port1
+ register "usb2_ports[1]" = "USB2_PORT_EMPTY" # M.2 WWAN
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A Port1
+ register "usb2_ports[3]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A Port 1
register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-C Port2
register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-C Port3
register "usb2_ports[9]" = "USB2_PORT_MID(OC3)" # CNVi/BT
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
index 91bbe93..eee3234 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
@@ -90,6 +90,15 @@
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* HPD_1 */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), /* DDP_1_CTRCLK */
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1), /* DDP_1_CTRDATA */
+
+ /* WWAN */
+ PAD_CFG_GPO(GPP_D11, 1, PLTRST), /* WWAN_PWREN */
+ PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* CLK SRC 2 */
+ PAD_CFG_GPI_SCI(GPP_C9, NONE, DEEP, LEVEL, INVERT), /* WWAN_WAKE_N */
+ PAD_CFG_GPO(GPP_C11, 1, PLTRST), /* FULL_CARD_POWER_OFF_N */
+ PAD_CFG_GPO(GPP_C10, 1, PLTRST), /* WWAN_RST_N */
+ PAD_CFG_GPO(GPP_B17, 1, PLTRST), /* WWAN_PERST_N */
+ PAD_CFG_GPO(GPP_D15, 1, PLTRST), /* WWAN_DISABLE_N */
};

const struct pad_config *variant_gpio_table(size_t *num)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie9b7915062b2ef65d881d478e64322c0b8765614
Gerrit-Change-Number: 45828
Gerrit-PatchSet: 1
Gerrit-Owner: Bora Guvendik <bora.guvendik@intel.com>
Gerrit-MessageType: newchange