Attention is currently required from: Raul Rangel, Nico Huber, Michał Żygowski, Subrata Banik, Reka Norman, Michał Kopeć, Angel Pons, Felix Held.
will this config also helps Xeon platforms?
It should help all Intel platform that supports CLFLUSH IMO.
Well on SPR xeon-sp against recommendations TempRamExit was overloaded with functionality to write things to DRAM to speed things up and therefore made mandatory in the bootflow. CLFLUSHING would have been a way better solution, as invalidating cache in a different environment (FSP) is just though to get right even from a security perspective...
ah, i missed that SPR is still using FSP-T
CAR setup is indeed quite complicated on Xeon-SP and requires FSP-T for now (coherency needs to be set up across CPUs). However CAR teardown is the same as (e)NEM. On CPX and SKX coreboot CAR teardown is used over FSP-M TempRamExit. On SPR-SP that's not possible anymore due to the modified bootflow.
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