Attention is currently required from: Hung-Te Lin, Nico Huber, Martin Roth, Paul Menzel, Julius Werner, Angel Pons, Yu-Ping Wu.
13 comments:
Commit Message:
Patch Set #16, Line 7: codes
code
Done
a
Done
"taken" or "considered"
Done
One space before "("
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File MAINTAINERS:
Patch Set #15, Line 617: MT8192
Will you work on DRAM for more platforms in future? […]
Currently, only mt8192.
Patch Set #15, Line 618: Xi Chen <xixi.chen@mediatek.com>
If you'll work on non-dram topics as well, feel free to move your self to "MEDIATEK SOCS"
Currently, mainly on DRAM, in MT8192 section now.
if this is for 8192 then the path should be mediatek/mt8192/
Done
mt8192/
Done
File src/vendorcode/mediatek/Kconfig:
Patch Set #16, Line 1: SOC_MEDIATEK_MT8192
can we move this to mt8192/Kconfig?
move the file to soc/mediatek/common.
config DEBUG_DRAM
bool "Output verbose DRAM related debug messages"
default y
help
This option enables additional DRAM related debug messages.
What Angel suggested sounds good. […]
Thanks for all your advice. Reuse DEBUG_RAM_SETUP is very good.
Add dramc_dbg in mediatek common file: soc/mediatek/common/.../dramc_common.h CB:51125
#define dramc_dbg(_x_...) do { \
if (CONFIG(DEBUG_DRAM)) \
printk(BIOS_INFO, _x_); \
} while (0)
Another reason we use dramc_xxx macro is that we want a simple log level macro:
eg:
#define err(_x_...) printk(BIOS_ERR, _x_)
#define info(_x_...) printk(BIOS_INFO, _x_)
Do these macros exist in common log header file?
config MEDIATEK_DRAM_DVFS
bool
default n
help
This option enables DRAM calibration with multiple frequencies (low,
medium and high frequency groups, with total 7 frequencies) for DVFS
feature. All supported data rates are: 800, 1200, 1600, 1866, 2400,
3200, 4266.
config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT
bool
default y
select MEDIATEK_DRAM_DVFS
help
This options limit DRAM frequency calibration count from total 7 to 3,
other frequency will directly use the low frequency shu result.
config MEMORY_TEST
bool
default y
help
This option enables memory basic compare test to verify the DRAM read
or write is as expected.
these options are not really used in the dramc implementation here. […]
Move them to soc/mediatek/common.
File src/vendorcode/mediatek/mt8192/dramc/ANA_init_config.c:
Patch Set #16, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */
I also prefer BSD3. @xixi please check with your internal teams and move to BSD3 if possible.
use GPL-2.0.
File src/vendorcode/mediatek/mt8192/include/print.h:
Patch Set #16, Line 7: #define printf print
What about just add […]
Done
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