Joel Kitching has uploaded this change for review.

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drivers/tpm: remove initialization call from Intel FSP2.0

Remove extraneous call to tpm_setup from Intel FSP memory
initialization.

* For CONFIG_VBOOT=n devices, src/drivers/tpm/tpm.c takes care of
initializing TPM (see Kconfig option TPM_INIT).
* For CONFIG_VBOOT=y devices, TPM will be initialized whenever
verstage is executed, depending on how the device is configured
(VBOOT_STARTS_IN_BOOTBLOCK or VBOOT_STARTS_IN_ROMSTAGE).

See bug for more information:
https://bugs.chromium.org/p/chromium/issues/detail?id=940377

BUG=chromium:940377
TEST=util/lint/checkpatch.pl -g origin/master..HEAD
TEST=util/abuild/abuild -B -e -y -c 50 -p none -x
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6
Signed-off-by: Joel Kitching <kitching@google.com>
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 0 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/31837/1
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 2002c11..04af4a0 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -92,14 +92,6 @@

/* Create romstage handof information */
romstage_handoff_init(s3wake);
-
- /*
- * Initialize the TPM, unless the TPM was already initialized
- * in verstage and used to verify romstage.
- */
- if ((IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) &&
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
- tpm_setup(s3wake);
}

static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4ba91c275c33245be61041cb592e52f861dbafe6
Gerrit-Change-Number: 31837
Gerrit-PatchSet: 1
Gerrit-Owner: Joel Kitching <kitching@google.com>
Gerrit-MessageType: newchange