[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add CPU Crashlog PCI driver

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Francois Toguo Fotso, Furquan Shaikh, Kane Chen, Patrick Rudolph, Karthik Ramasubramanian.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57685 )

Change subject: soc/intel/common: Add CPU Crashlog PCI driver
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Patch Set 7:

(2 comments)

File src/soc/intel/common/block/crashlog/cpu_crashlog.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139924):
https://review.coreboot.org/c/coreboot/+/57685/comment/85d9da82_6bac32c0 
PS7, Line 173: 		printk(BIOS_SPEW, "Collecting %u dwords from SRAM at %lx\n", buffer.size, bar + buffer.offset);
line over 96 characters

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139924):
https://review.coreboot.org/c/coreboot/+/57685/comment/767737e8_74e24ad8 
PS7, Line 186: 	header_offset = crashlog_info.table.offset + offsetof(struct cpu_crashlog_table, header);
line over 96 characters