Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Caveh Jalali: Looks good to me, approved
mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up3

Two usb Type-C ports under the actual mux device. Each port has its own
ACPI device entry. These nodes are the ones that the USB Type-C
port/connector device will refer to in order to configure the mux.

TEST=Verified the scope of PMC.MUX CONx in the SSDT on Tigerlake RVP
board.

Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I7210e00cebe16a5fb8417ac23abad98e574e0982
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42953
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/intel/tglrvp/Kconfig
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig
index e4d605e..cfebc6b 100644
--- a/src/mainboard/intel/tglrvp/Kconfig
+++ b/src/mainboard/intel/tglrvp/Kconfig
@@ -9,6 +9,7 @@
select DRIVERS_I2C_HID
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_MAX98373
+ select DRIVERS_INTEL_PMC
select DRIVERS_USB_ACPI
select DRIVERS_SPI_ACPI
select GENERATE_SMBIOS_TABLES
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 4550815..4010772 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -254,7 +254,28 @@
device pci 1e.3 off end # GSPI1 0xA0AB
device pci 1f.0 on end # eSPI 0xA080 - A09F
device pci 1f.1 on end # P2SB 0xA0A0
- device pci 1f.2 hidden end # PMC 0xA0A1
+ device pci 1f.2 hidden # PMC 0xA0A1
+ # The pmc_mux chip driver is a placeholder for the
+ # PMC.MUX device in the ACPI hierarchy.
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "6"
+ register "usb3_port_number" = "3"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 0 on end
+ end
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "7"
+ register "usb3_port_number" = "4"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 1 on end
+ end
+ end
+ end
+ end # PMC
device pci 1f.3 on end # Intel HD audio 0xA0C8-A0CF
device pci 1f.4 on end # SMBus 0xA0A3
device pci 1f.5 on end # SPI 0xA0A4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7210e00cebe16a5fb8417ac23abad98e574e0982
Gerrit-Change-Number: 42953
Gerrit-PatchSet: 5
Gerrit-Owner: John Zhao <john.zhao@intel.com>
Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein@intel.com>
Gerrit-Reviewer: Caveh Jalali <caveh@chromium.org>
Gerrit-Reviewer: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Shamile Khan <shamile.khan@intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged