[coreboot-gerrit] Change in coreboot[master]: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config

[Angel Pons (Code Review)]

Attention is currently required from: Felix Singer, Erik van den Bogaert, Michał Żygowski, Subrata Banik, Frans Hendriks, Tim Wawrzynczak, Michael Niewöhner, Patrick Rudolph, Piotr Król.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60722 )

Change subject: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config
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Patch Set 3:

(1 comment)

Patchset:

PS3: 
Note that the following boards don't specify `HeciEnabled` in the devicetree, so this patch would change the behavior for them (HECI would no longer be hidden):

kontron/bsl6
system76/kbl-u
hp/280_g2
intel/saddlebrook
supermicro/x11-lga1151-series

For now, I'd have these boards select the "hide HECI" Kconfig option so that this change doesn't change the code behavior, and adjust individual boards in follow-up commits if needed.