Peichao Li has uploaded this change for review.
mb/google/zork/vilboz: enable LTE function
BUG=b:161736991
TEST=flash the BIOS and insure LTE function work properly
Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com>
Change-Id: I130bd76aad0a4b8f3a82090d97f140a0a7ed958e
---
M src/mainboard/google/zork/variants/vilboz/Makefile.inc
A src/mainboard/google/zork/variants/vilboz/gpio.c
2 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/43663/1
diff --git a/src/mainboard/google/zork/variants/vilboz/Makefile.inc b/src/mainboard/google/zork/variants/vilboz/Makefile.inc
index dc1e411..51d19fe 100644
--- a/src/mainboard/google/zork/variants/vilboz/Makefile.inc
+++ b/src/mainboard/google/zork/variants/vilboz/Makefile.inc
@@ -2,4 +2,5 @@
subdirs-y += ./spd
+ramstage-y += gpio.c
ramstage-y += variant.c
diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c
new file mode 100644
index 0000000..4d292c2
--- /dev/null
+++ b/src/mainboard/google/zork/variants/vilboz/gpio.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <boardid.h>
+#include <gpio.h>
+#include <soc/gpio.h>
+
+static const struct soc_amd_gpio lte_gpio_set_stage_ram[] = {
+ /* LTE POWER ENABLE */
+ PAD_GPO(GPIO_32, HIGH),
+};
+
+
+const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
+{
+ *size = ARRAY_SIZE(lte_gpio_set_stage_ram);
+ return lte_gpio_set_stage_ram;
+}
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