Attention is currently required from: Raul Rangel, Furquan Shaikh, Karthik Ramasubramanian, Felix Held.
1 comment:
File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb:
Makes sense. Thanks Felix! I think most parts support upto 50MHz for normal speed. […]
The way I remember it from older FCH, MMIO access right below 4 GiB will use either .normal_speed or .fast_speed while everything through the SPI driver layer will use .altio_speed.
In spi_ctrlr_xfer() register SPI_CMD_CODE 0x45 aliases/shadows 0x0 named SpiOpCode:
SpiOpCode. Read-write. Reset: 0. Specifies the SPI opcode in alternate program method.
We can find some old 3V parts marketed as dual-IO and 80MHz, which might fail with 66MHz as .fast_speed or .altio_speed. One example -- SST25VF064C, EOL 2015. If some of this change is pushed to older agesa/hudson better keep the default to 33MHz on all boards.
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