Arthur Heymans submitted this change.

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Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
cpu/x86/sipi: Add x86_64 support

Enter long mode on secondary APs.

Tested on Lenovo T410 with additional x86_64 patches.
Tested on HP Z220 with additional x86_64 patches.

Still boots on x86_32.

Change-Id: I53eae082123d1a12cfa97ead1d87d84db4a334c0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
M src/cpu/x86/64bit/entry64.inc
M src/cpu/x86/sipi_vector.S
2 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/src/cpu/x86/64bit/entry64.inc b/src/cpu/x86/64bit/entry64.inc
index 65c0fdc..7025517 100644
--- a/src/cpu/x86/64bit/entry64.inc
+++ b/src/cpu/x86/64bit/entry64.inc
@@ -16,7 +16,12 @@
#endif

#include <cpu/x86/msr.h>
+#if defined(__RAMSTAGE__)
+#include <arch/ram_segs.h>
+#else
#include <arch/rom_segs.h>
+#endif
+

setup_longmode:
/* Get page table address */
@@ -42,7 +47,12 @@
movl %eax, %cr0

/* use long jump to switch to 64-bit code segment */
+#if defined(__RAMSTAGE__)
+ ljmp $RAM_CODE_SEG64, $__longmode_start
+#else
ljmp $ROM_CODE_SEG64, $__longmode_start
+
+#endif
.code64
__longmode_start:

diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index 054f30d..61d9e34 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -5,6 +5,8 @@
#include <cpu/x86/msr.h>
#include <arch/ram_segs.h>

+#define __RAMSTAGE__
+
/* The SIPI vector is responsible for initializing the APs in the system. It
* loads microcode, sets up MSRs, and enables caching before calling into
* C code. */
@@ -192,11 +194,24 @@
mov %eax, %cr4
#endif

+#ifdef __x86_64__
+ /* entry64.inc preserves ebx. */
+#include <cpu/x86/64bit/entry64.inc>
+
+ mov %rsi, %rdi /* cpu_num */
+
+ movl c_handler, %eax
+ call *%rax
+#else
/* c_handler(cpu_num), preserve proper stack alignment */
sub $12, %esp
push %esi /* cpu_num */
+
mov c_handler, %eax
call *%eax
+#endif
+
+
halt_jump:
hlt
jmp halt_jump

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I53eae082123d1a12cfa97ead1d87d84db4a334c0
Gerrit-Change-Number: 45187
Gerrit-PatchSet: 2
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged