mturney mturney has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35495 )
Change subject: trogdor: initial mainboard + libpayload support ......................................................................
trogdor: initial mainboard + libpayload support
Change-Id: Ic2f0944b92dcad7048a0c38720d2ef3c855ef007 Signed-off-by: T Michael Turney mturney@codeaurora.org --- M payloads/libpayload/Kconfig A payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/sc7180.c A src/mainboard/google/trogdor/Kconfig A src/mainboard/google/trogdor/Kconfig.name A src/mainboard/google/trogdor/Makefile.inc A src/mainboard/google/trogdor/board.h A src/mainboard/google/trogdor/board_info.txt A src/mainboard/google/trogdor/boardid.c A src/mainboard/google/trogdor/bootblock.c A src/mainboard/google/trogdor/chromeos.c A src/mainboard/google/trogdor/chromeos.fmd A src/mainboard/google/trogdor/devicetree.cb A src/mainboard/google/trogdor/mainboard.c A src/mainboard/google/trogdor/memlayout.ld A src/mainboard/google/trogdor/reset.c A src/mainboard/google/trogdor/romstage.c 18 files changed, 492 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/35495/1
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 97b970b..0bab0db 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -263,6 +263,11 @@ depends on SERIAL_CONSOLE default n
+config SC7180_SERIAL_CONSOLE + bool "SC7180 SOC compatible serial port driver" + depends on SERIAL_CONSOLE + default n + config PL011_SERIAL_CONSOLE bool "PL011 compatible serial port driver" depends on 8250_SERIAL_CONSOLE diff --git a/payloads/libpayload/configs/config.trogdor b/payloads/libpayload/configs/config.trogdor new file mode 100644 index 0000000..0625ff5 --- /dev/null +++ b/payloads/libpayload/configs/config.trogdor @@ -0,0 +1,5 @@ +CONFIG_LP_CHROMEOS=y +CONFIG_LP_ARCH_ARM64=y +CONFIG_LP_TIMER_ARM64_ARCH=y +CONFIG_LP_SERIAL_CONSOLE=y +CONFIG_LP_SC7180_SERIAL_CONSOLE=y diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index b4e7594..701434d 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -38,6 +38,7 @@ libc-$(CONFIG_LP_IPQ806X_SERIAL_CONSOLE) += serial/ipq806x.c serial/serial.c libc-$(CONFIG_LP_IPQ40XX_SERIAL_CONSOLE) += serial/ipq40xx.c serial/serial.c libc-$(CONFIG_LP_QCS405_SERIAL_CONSOLE) += serial/qcs405.c serial/serial.c +libc-$(CONFIG_LP_SC7180_SERIAL_CONSOLE) += serial/sc7180.c serial/serial.c libc-$(CONFIG_LP_PC_KEYBOARD) += i8042/keyboard.c libc-$(CONFIG_LP_PC_MOUSE) += i8042/mouse.c libc-$(CONFIG_LP_PC_I8042) += i8042/i8042.c diff --git a/payloads/libpayload/drivers/serial/sc7180.c b/payloads/libpayload/drivers/serial/sc7180.c new file mode 100644 index 0000000..0908ee6 --- /dev/null +++ b/payloads/libpayload/drivers/serial/sc7180.c @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2010-2012, 2014, 2016, 2019, The Linux Foundation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of The Linux Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <libpayload.h> + +/* For simplicity sake let's rely on coreboot initalizing the UART. */ +void serial_console_init(void) +{ + +} diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig new file mode 100644 index 0000000..12e3423 --- /dev/null +++ b/src/mainboard/google/trogdor/Kconfig @@ -0,0 +1,55 @@ + +config BOARD_GOOGLE_TROGDOR_COMMON # Umbrella option to be selected by variants + def_bool n + +if BOARD_GOOGLE_TROGDOR_COMMON + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_6144 + select COMMON_CBFS_SPI_WRAPPER + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_RTC + select EC_GOOGLE_CHROMEEC_SPI + select RTC + select SOC_QUALCOMM_SC7180 + select SPI_FLASH + select SPI_FLASH_WINBOND + select MAINBOARD_HAS_CHROMEOS + +config VBOOT + select EC_GOOGLE_CHROMEEC_SWITCHES + select VBOOT_VBNV_FLASH + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select VBOOT_MOCK_SECDATA + +config MAINBOARD_DIR + string + default google/trogdor + +config MAINBOARD_VENDOR + string + default "Google" + +config DRIVER_TPM_SPI_BUS + hex + default 0x5 + +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0xa + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## + +config MAINBOARD_PART_NUMBER + string + default "Trogdor" if BOARD_GOOGLE_TROGDOR + +config GBB_HWID + string + depends on CHROMEOS + default "TROGDOR TEST 1859" if BOARD_GOOGLE_TROGDOR + +endif # BOARD_GOOGLE_TROGDOR_COMMON diff --git a/src/mainboard/google/trogdor/Kconfig.name b/src/mainboard/google/trogdor/Kconfig.name new file mode 100644 index 0000000..425c9bf --- /dev/null +++ b/src/mainboard/google/trogdor/Kconfig.name @@ -0,0 +1,4 @@ + +config BOARD_GOOGLE_TROGDOR + bool "Trogdor" + select BOARD_GOOGLE_TROGDOR_COMMON diff --git a/src/mainboard/google/trogdor/Makefile.inc b/src/mainboard/google/trogdor/Makefile.inc new file mode 100644 index 0000000..5657df8 --- /dev/null +++ b/src/mainboard/google/trogdor/Makefile.inc @@ -0,0 +1,38 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2018 Google LLC +## Copyright 2019 The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +bootblock-y += boardid.c +bootblock-y += memlayout.ld +bootblock-y += chromeos.c +bootblock-y += bootblock.c +bootblock-y += reset.c + +verstage-y += boardid.c +verstage-y += memlayout.ld +verstage-y += chromeos.c +verstage-y += reset.c + +romstage-y += boardid.c +romstage-y += memlayout.ld +romstage-y += chromeos.c +romstage-y += romstage.c +romstage-y += reset.c + +ramstage-y += boardid.c +ramstage-y += memlayout.ld +ramstage-y += chromeos.c +ramstage-y += mainboard.c +ramstage-y += reset.c diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h new file mode 100644 index 0000000..23e40fc --- /dev/null +++ b/src/mainboard/google/trogdor/board.h @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ +#define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ + +#include <gpio.h> +#include <soc/gpio.h> + +/* TODO: update these for Trogdor hardware */ +#define GPIO_EC_IN_RW GPIO(11) +#define GPIO_AP_EC_INT GPIO(122) +#define GPIO_AP_SUSPEND GPIO(126) +#define GPIO_WP_STATE GPIO(128) +#define GPIO_H1_AP_INT GPIO(129) + +void setup_chromeos_gpios(void); + +#endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ */ diff --git a/src/mainboard/google/trogdor/board_info.txt b/src/mainboard/google/trogdor/board_info.txt new file mode 100644 index 0000000..a4b8b4e --- /dev/null +++ b/src/mainboard/google/trogdor/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Trogdor Qualcomm Trogdor reference board +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/trogdor/boardid.c b/src/mainboard/google/trogdor/boardid.c new file mode 100644 index 0000000..2de72ba --- /dev/null +++ b/src/mainboard/google/trogdor/boardid.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * Copyright 2019 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boardid.h> +#include <gpio.h> + +uint32_t board_id(void) +{ + static uint32_t id = UNDEFINED_STRAPPING_ID; +#if 0 + /* TODO: update gpios for Trogdor */ + const gpio_t pins[] = {[2] = GPIO(51), [1] = GPIO(62), [0] = GPIO(38)}; + + if (id == UNDEFINED_STRAPPING_ID) + id = gpio_base2_value(pins, ARRAY_SIZE(pins)); +#endif + return id; +} + +uint32_t ram_code(void) +{ + static uint32_t id = UNDEFINED_STRAPPING_ID; +#if 0 + /* TODO: update gpios for Trogdor */ + const gpio_t pins[] = {[1] = GPIO(147), [0] = GPIO(146)}; + + if (id == UNDEFINED_STRAPPING_ID) + id = gpio_base2_value(pins, ARRAY_SIZE(pins)); +#endif + return id; +} + +uint32_t sku_id(void) +{ + static uint32_t id = UNDEFINED_STRAPPING_ID; +#if 0 + /* TODO: update gpios for Trogdor */ + const gpio_t pins[] = {[1] = GPIO(113), [0] = GPIO(79)}; + + if (id == UNDEFINED_STRAPPING_ID) + id = gpio_base2_value(pins, ARRAY_SIZE(pins)); +#endif + return id; +} diff --git a/src/mainboard/google/trogdor/bootblock.c b/src/mainboard/google/trogdor/bootblock.c new file mode 100644 index 0000000..c658093 --- /dev/null +++ b/src/mainboard/google/trogdor/bootblock.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include "board.h" + +void bootblock_mainboard_init(void) +{ + setup_chromeos_gpios(); +} diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c new file mode 100644 index 0000000..f5764c0 --- /dev/null +++ b/src/mainboard/google/trogdor/chromeos.c @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boot/coreboot_tables.h> +#include <bootmode.h> +#include "board.h" + +int get_write_protect_state(void) +{ +#if 0 + return !gpio_get(GPIO_WP_STATE); +#else + return 0; +#endif +} + +void setup_chromeos_gpios(void) +{ +#if 0 + /* Example of what needs to be done here */ + gpio_input_pullup(GPIO_EC_IN_RW); + gpio_input_pullup(GPIO_AP_EC_INT); + gpio_output(GPIO_AP_SUSPEND, 1); + gpio_input(GPIO_WP_STATE); + gpio_input_pullup(GPIO_H1_AP_INT); +#endif +} + +void fill_lb_gpios(struct lb_gpios *gpios) +{ +#if 0 + /* Example of what needs to be done here */ + struct lb_gpio chromeos_gpios[] = { + {GPIO_EC_IN_RW.addr, ACTIVE_LOW, gpio_get(GPIO_EC_IN_RW), + "EC in RW"}, + {GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT), + "EC interrupt"}, + {GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, + {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), + "TPM interrupt"}, + }; + + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); +#endif +} diff --git a/src/mainboard/google/trogdor/chromeos.fmd b/src/mainboard/google/trogdor/chromeos.fmd new file mode 100644 index 0000000..c7a0ad1 --- /dev/null +++ b/src/mainboard/google/trogdor/chromeos.fmd @@ -0,0 +1,56 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +# TODO: update for Trogdor +FLASH@0x0 6M { + WP_RO 3M { + RO_SECTION 0x184000 { + BOOTBLOCK 96K + COREBOOT(CBFS) + #TODO: Move FMAP to 2M or 3M once FSG can be smaller + FMAP@0x180000 0x1000 + GBB 0x2f00 + RO_FRID 0x100 + } + RO_VPD(PRESERVE) 16K + RO_DDR_TRAINING(PRESERVE) 8K + RO_LIMITS_CFG(PRESERVE) 4K + RO_FSG(PRESERVE) + } + + RW_VPD(PRESERVE) 32K + RW_NVRAM(PRESERVE) 16K + RW_DDR_TRAINING(PRESERVE) 8K + RW_LIMITS_CFG(PRESERVE) 4K + RW_ELOG(PRESERVE) 4K + RW_SHARED 4K { + SHARED_DATA + } + + RW_SECTION_A 1024K { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 256 + } + + + RW_SECTION_B 1024K { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 256 + } + + RW_LEGACY(CBFS) +} diff --git a/src/mainboard/google/trogdor/devicetree.cb b/src/mainboard/google/trogdor/devicetree.cb new file mode 100644 index 0000000..d64ade4 --- /dev/null +++ b/src/mainboard/google/trogdor/devicetree.cb @@ -0,0 +1,18 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License version 2 and +## only version 2 as published by the Free Software Foundation. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip soc/qualcomm/sc7180 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c new file mode 100644 index 0000000..ce03ce1 --- /dev/null +++ b/src/mainboard/google/trogdor/mainboard.c @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/device.h> +#include <bootblock_common.h> +#include <arch/mmio.h> +#include <gpio.h> +#include <timestamp.h> + +static void mainboard_init(struct device *dev) +{ + +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .name = CONFIG_MAINBOARD_PART_NUMBER, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/trogdor/memlayout.ld b/src/mainboard/google/trogdor/memlayout.ld new file mode 100644 index 0000000..e9b147c --- /dev/null +++ b/src/mainboard/google/trogdor/memlayout.ld @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + #include <soc/memlayout.ld> diff --git a/src/mainboard/google/trogdor/reset.c b/src/mainboard/google/trogdor/reset.c new file mode 100644 index 0000000..558f63d --- /dev/null +++ b/src/mainboard/google/trogdor/reset.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * Copyright 2019 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <ec/google/chromeec/ec.h> +#include <reset.h> + +/* Can't do a "real" reset before the PMIC is initialized in QcLib (romstage), + but this works well enough for our purposes. */ +void do_board_reset(void) +{ + google_chromeec_reboot(0, EC_REBOOT_COLD, 0); +} diff --git a/src/mainboard/google/trogdor/romstage.c b/src/mainboard/google/trogdor/romstage.c new file mode 100644 index 0000000..7185387 --- /dev/null +++ b/src/mainboard/google/trogdor/romstage.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/stages.h> +#include <soc/qclib_common.h> + +void platform_romstage_main(void) +{ + /* QCLib: DDR init & train */ + qclib_load_and_run(); +}