Attention is currently required from: EricR Lai.
2 comments:
File src/mainboard/google/brya/variants/baseboard/devicetree.cb:
Patch Set #15, Line 105: #USB3-1 Type A
Do we need to enable RP port if this is combo PCIE and USB?
No, the lanes would be owned by the USB controller and hence the PCIe RP should be kept off.
Patch Set #15, Line 134: PCIE_RP_LTR
Previous project not enabled for it. LTR may cause device lose when suspend/resume. […]
I don't think that's correct. LTR is important for ensuring the PCIe links can enter their low power state. I think we should keep it enabled for all ports.
I think we should enable AER. It is helpful in identifying link errors.
To view, visit change 49007. To unsubscribe, or for help writing mail filters, visit settings.