Subrata Banik uploaded patch set #3 to this change.

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src/mainboard/{intel/google}: Include ASL for additional PCI segment

This patch allows mainboard to include static ASL for TBT PCI segment

extracted build/dsdt.aml

Device (PCI1)
{
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
Name (_SEG, One) // _SEG: PCI Segment
Name (_UID, One) // _UID: Unique ID
....
}

Change-Id: I3601aa4e9002334fd80fc86ced9e1df2afc739b5
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/mainboard/google/deltaur/dsdt.asl
M src/mainboard/google/volteer/dsdt.asl
M src/mainboard/intel/tglrvp/dsdt.asl
3 files changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/41012/3

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3601aa4e9002334fd80fc86ced9e1df2afc739b5
Gerrit-Change-Number: 41012
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus@gmail.com>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset