Bernardo Perez Priego has uploaded this change for review.

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mb/google/drallion: Disabling Wifi and BT

This is for test only, DONOT MERGE

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Ida91538fe058bc294a25df7c4148b771a5de1d53
---
M src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
M src/mainboard/google/drallion/variants/drallion/devicetree.cb
M src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb
3 files changed, 9 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/37648/1
diff --git a/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb b/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
index 11abc87..912672c 100644
--- a/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/arcada_cml/devicetree.cb
@@ -146,7 +146,7 @@
}" # WWAN
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # USH
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ #register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth

register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Type-C Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # Left Type-A Port
@@ -283,7 +283,7 @@
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H15)"
- device usb 2.9 on end
+ device usb 2.9 off end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
@@ -314,7 +314,7 @@
device pci 14.1 off end # USB xDCI (OTG)
chip drivers/intel/wifi
register "wake" = "PME_B0_EN_BIT"
- device pci 14.3 on end # CNVi wifi
+ device pci 14.3 off end # CNVi wifi
end
device pci 14.5 off end # SDCard
device pci 15.0 on
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index 75fd3ee..e363f29 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -151,7 +151,7 @@
register "usb2_ports[6]" = "USB2_PORT_EMPTY"
register "usb2_ports[7]" = "USB2_PORT_EMPTY"
register "usb2_ports[8]" = "USB2_PORT_EMPTY"
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ #register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth

register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Type-C Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Type-C Port 2
@@ -290,7 +290,7 @@
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H15)"
- device usb 2.9 on end
+ device usb 2.9 off end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
@@ -327,7 +327,7 @@
device pci 14.1 off end # USB xDCI (OTG)
chip drivers/intel/wifi
register "wake" = "PME_B0_EN_BIT"
- device pci 14.3 on end # CNVi wifi
+ device pci 14.3 off end # CNVi wifi
end
device pci 14.5 off end # SDCard
device pci 15.0 on
diff --git a/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb b/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb
index c466637..e61f966 100644
--- a/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/sarien_cml/devicetree.cb
@@ -145,7 +145,7 @@
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WWAN
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # USH
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ #register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth

register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Type-C Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # Right Type-A Port 1
@@ -287,7 +287,7 @@
register "desc" = ""Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H15)"
- device usb 2.9 on end
+ device usb 2.9 off end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
@@ -324,7 +324,7 @@
device pci 14.1 off end # USB xDCI (OTG)
chip drivers/intel/wifi
register "wake" = "PME_B0_EN_BIT"
- device pci 14.3 on end # CNVi wifi
+ device pci 14.3 off end # CNVi wifi
end
device pci 14.5 off end # SDCard
device pci 15.0 on

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ida91538fe058bc294a25df7c4148b771a5de1d53
Gerrit-Change-Number: 37648
Gerrit-PatchSet: 1
Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Gerrit-MessageType: newchange