Patrick Rudolph uploaded patch set #6 to this change.

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nb/intel/sandybridge: Migrate MRC settings to devicetree

* Add more chip register to move PEI data to devicetree.cb.
* Set northbridge/southbridge and runtime detectable settings.
* Fill in values from devicetree.

This change is still a noop as the pei structure is completely overwritten
with the exsting mainboard pei structure.

The followup commit will migrate to devicetree.cb.

Tested on Lenovo T520, boots MRC path with the new devicetree settings.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Ic6d9f0fd6a2b792ac693d6016ed9ce44945c900c
---
M src/northbridge/intel/sandybridge/chip.h
M src/northbridge/intel/sandybridge/raminit_mrc.c
2 files changed, 149 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/32069/6

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic6d9f0fd6a2b792ac693d6016ed9ce44945c900c
Gerrit-Change-Number: 32069
Gerrit-PatchSet: 6
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset