Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21540
Change subject: soc/intel/skylake: Calculate soc reserved memory size ......................................................................
soc/intel/skylake: Calculate soc reserved memory size
Read EBDA area to get intel various reserved memory (PRMRR, TraceHub, PTT etc) size which generates during romstage memory calculation.
BRANCH=none BUG=b:63974384 TEST=Ensures DRAM based resource allocation has taken care of intel soc reserved ranges.
Change-Id: I19583f7d18ca11c3a58eb61c927e5c3c3b65d2ec Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/skylake/systemagent.c 1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/21540/1
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c index 6149fa2..f2948ab 100644 --- a/src/soc/intel/skylake/systemagent.c +++ b/src/soc/intel/skylake/systemagent.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <delay.h> #include <device/device.h> +#include <intelblocks/ebda.h> #include <intelblocks/systemagent.h> #include <soc/cpu.h> #include <soc/iomap.h> @@ -62,3 +63,20 @@ mdelay(1); set_power_limits(28); } + +/* + * SoC implementation + * + * SoC call to summarize all Intel Reserve MMIO size and report to SA + */ +size_t soc_reversed_mmio_size(void) +{ + ebda_config *cfg = NULL; + + if (!is_ebda_initialized(cfg)) + return 0; + + cfg = (ebda_config *)read_ebda_data(sizeof(ebda_config)); + + return cfg->prmrr_size + cfg->tracehub_size + cfg->ptt_size; +}