Edward O'Callaghan has uploaded this change for review.
mb/google/puff: Convert ASL file to new DPTF dt impl
This patch converts the current DPTF policies from static ASL files into
the new SSDT-based DPTF implementation. All settings are intended to be
copied exactly.
BUG=b:158986928
BRANCH=puff
TEST=none
Change-Id: I45987f44ec381917173f8d2a878edb50da454b4b
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M src/mainboard/google/hatch/Kconfig
D src/mainboard/google/hatch/variants/puff/include/variant/acpi/dptf.asl
M src/mainboard/google/hatch/variants/puff/overridetree.cb
3 files changed, 59 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/44905/1
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig
index a658b2a..8b1eb09 100644
--- a/src/mainboard/google/hatch/Kconfig
+++ b/src/mainboard/google/hatch/Kconfig
@@ -12,6 +12,7 @@
select ROMSTAGE_SPD_SMBUS
select SPD_READ_BY_WORD
select SOC_INTEL_CSE_LITE_SKU
+ select DRIVERS_INTEL_DPTF
config BOARD_GOOGLE_HATCH_COMMON
def_bool n
diff --git a/src/mainboard/google/hatch/variants/puff/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/puff/include/variant/acpi/dptf.asl
deleted file mode 100644
index 6694063..0000000
--- a/src/mainboard/google/hatch/variants/puff/include/variant/acpi/dptf.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <puff/acpi/dptf.asl>
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb
index a5aa702..2a0bb15 100644
--- a/src/mainboard/google/hatch/variants/puff/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb
@@ -205,6 +205,64 @@
register "sata_port[1].TxGen3DeEmph" = "0x20"
device domain 0 on
+ device pci 04.0 on
+ # Default DPTF Policy for all Puff boards if not overridden
+ chip drivers/intel/dptf
+ ## Active Policy
+ register "policies.active[0]" = "{.target=DPTF_CPU,
+ .thresholds={TEMP_PCT(85, 90),
+ TEMP_PCT(80, 69),
+ TEMP_PCT(75, 56),
+ TEMP_PCT(70, 46),
+ TEMP_PCT(65, 36),}}"
+
+ ## Passive Policy
+ register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 93, 5000)"
+
+ ## Critical Policy
+ register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
+
+ ## Power Limits Control
+ # 10-15W PL1 in 200mW increments, avg over 28-32s interval
+ # PL2 is fixed at 64W, avg over 28-32s interval
+ register "controls.power_limits.pl1" = "{
+ .min_power = 3000,
+ .max_power = 15000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 200,}"
+ register "controls.power_limits.pl2" = "{
+ .min_power = 15000,
+ .max_power = 60000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 1000,}"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf[0]" = "{ 255, 1700 }"
+ register "controls.charger_perf[1]" = "{ 24, 1500 }"
+ register "controls.charger_perf[2]" = "{ 16, 1000 }"
+ register "controls.charger_perf[3]" = "{ 8, 500 }"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf[0]" = "{ 90, 6700, 220, 2200, }"
+ register "controls.fan_perf[1]" = "{ 80, 5800, 180, 1800, }"
+ register "controls.fan_perf[2]" = "{ 70, 5000, 145, 1450, }"
+ register "controls.fan_perf[3]" = "{ 60, 4900, 115, 1150, }"
+ register "controls.fan_perf[4]" = "{ 50, 3838, 90, 900, }"
+ register "controls.fan_perf[5]" = "{ 40, 2904, 55, 550, }"
+ register "controls.fan_perf[6]" = "{ 30, 2337, 30, 300, }"
+ register "controls.fan_perf[7]" = "{ 20, 1608, 15, 150, }"
+ register "controls.fan_perf[8]" = "{ 10, 800, 10, 100, }"
+ register "controls.fan_perf[9]" = "{ 0, 0, 0, 50, }"
+
+ # Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
+ device generic 0 on end
+ end
+ end # DPTF 0x1903
device pci 14.0 on
chip drivers/usb/acpi
device usb 0.0 on
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