Attention is currently required from: Michał Żygowski, Angel Pons, Patrick Rudolph.
Arthur Heymans uploaded patch set #4 to this change.
soc/intel/cache_as_ram.S: Fix CAR issues with Bootguard
It looks like the 'clear_car' code does not properly fill the required
cachelines so add code to fill cachelines explicitly.
Change-Id: Id5d77295f6d24f9d2bc23f39f8772fd172ac8910
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/55791/4
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