Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3314
-gerrit
commit 974a23e61b257d9f3eccf02762bee8c6ad943507 Author: Rudolf Marek r.marek@assembler.cz Date: Mon May 27 16:06:43 2013 +0200
AMD Fam15tn: Add IOMMU BAR allocation to northbridge
For IOMMU we need to allocate a 512 KB BAR in a non-standard location. Use the standard allocator for that and limit the BAR to 32-bits to be compatible with older systems.
Change-Id: I44414ce6b264b7f1c086a9b1c7ea275a0830205e Signed-off-by: Rudolf Marek r.marek@assembler.cz Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/include/device/pci_ids.h | 1 + src/northbridge/amd/agesa/family15tn/Makefile.inc | 1 + src/northbridge/amd/agesa/family15tn/iommu.c | 73 +++++++++++++++++++++++ 3 files changed, 75 insertions(+)
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index f5ba7f7..3ad6351 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -287,6 +287,7 @@ #define PCI_DEVICE_ID_AMD_15H_MODEL_000F_NB_HT 0x1600 #define PCI_DEVICE_ID_AMD_15H_MODEL_001F_NB_HT 0x1400 #define PCI_DEVICE_ID_AMD_10H_NB_HT 0x1200 +#define PCI_DEVICE_ID_AMD_15H_NB_IOMMU 0x1419
#define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 diff --git a/src/northbridge/amd/agesa/family15tn/Makefile.inc b/src/northbridge/amd/agesa/family15tn/Makefile.inc index b609ee6..afec3c0 100644 --- a/src/northbridge/amd/agesa/family15tn/Makefile.inc +++ b/src/northbridge/amd/agesa/family15tn/Makefile.inc @@ -20,6 +20,7 @@ romstage-y += fam15tn_callouts.c romstage-y += dimmSpd.c
+ramstage-y += iommu.c ramstage-y += northbridge.c ramstage-y += fam15tn_callouts.c ramstage-y += dimmSpd.c diff --git a/src/northbridge/amd/agesa/family15tn/iommu.c b/src/northbridge/amd/agesa/family15tn/iommu.c new file mode 100644 index 0000000..3765f20 --- /dev/null +++ b/src/northbridge/amd/agesa/family15tn/iommu.c @@ -0,0 +1,73 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Rudolf Marek r.marek@assembler.cz + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include <lib.h> + +static void iommu_read_resources(device_t dev) +{ + struct resource *res; + + /* Get the normal pci resources of this device */ + pci_dev_read_resources(dev); + + /* Add an extra subtractive resource for both memory and I/O. */ + res = new_resource(dev, 0x44); + res->size = 512 * 1024; + res->align = log2(res->size); + res->gran = log2(res->size); + res->limit = 0xffffffff; /* 4G */ + res->flags = IORESOURCE_MEM; +} + +static void iommu_set_resources(device_t dev) +{ + struct resource *res; + + pci_dev_set_resources(dev); + + res = find_resource(dev, 0x44); + /* Remember this resource has been stored */ + res->flags |= IORESOURCE_STORED; + /* For now, do only 32-bit space allocation */ + pci_write_config32(dev, 0x48, 0x0); + pci_write_config32(dev, 0x44, res->base | (1 << 0)); +} + +static struct pci_operations lops_pci = { + .set_subsystem = pci_dev_set_subsystem, +}; + +static struct device_operations iommu_ops = { + .read_resources = iommu_read_resources, + .set_resources = iommu_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = 0, + .scan_bus = 0, + .ops_pci = &lops_pci, +}; + +static const struct pci_driver iommu_driver __pci_driver = { + .ops = &iommu_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_15H_NB_IOMMU, +};