Patrick Georgi merged this change.
Documentation: Add MSI MS-7707
Change-Id: Iba38bda9becba9fcffb51afc4756023659f092ef
Signed-off-by: Max Blau <tripleshiftone@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
---
M Documentation/mainboard/index.md
A Documentation/mainboard/msi/ms7707/J1-flash-protect.jpg
A Documentation/mainboard/msi/ms7707/JSPI1-Winbond-W25Q32BVSIG.jpg
A Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg
A Documentation/mainboard/msi/ms7707/JSPI1.png
A Documentation/mainboard/msi/ms7707/flashlayout.svg
A Documentation/mainboard/msi/ms7707/ms7707.md
7 files changed, 150 insertions(+), 0 deletions(-)
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index 7eaf425..9af5c80 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -70,6 +70,10 @@
- [T430 / T530 / X230 / W530 common](lenovo/xx30_series.md)
- [T431s](lenovo/t431s.md)
+## MSI
+
+- [MS-7707](msi/ms7707/ms7707.md)
+
## SiFive
- [SiFive HiFive Unleashed](sifive/hifive-unleashed.md)
diff --git a/Documentation/mainboard/msi/ms7707/J1-flash-protect.jpg b/Documentation/mainboard/msi/ms7707/J1-flash-protect.jpg
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diff --git a/Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg b/Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg
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+++ b/Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg
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diff --git a/Documentation/mainboard/msi/ms7707/JSPI1.png b/Documentation/mainboard/msi/ms7707/JSPI1.png
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+++ b/Documentation/mainboard/msi/ms7707/JSPI1.png
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diff --git a/Documentation/mainboard/msi/ms7707/flashlayout.svg b/Documentation/mainboard/msi/ms7707/flashlayout.svg
new file mode 100644
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--- /dev/null
+++ b/Documentation/mainboard/msi/ms7707/flashlayout.svg
@@ -0,0 +1,34 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<svg width="10cm" height="8cm" version="1.1" viewBox="265 -156 186 159" xmlns="http://www.w3.org/2000/svg" xmlns:cc="http://creativecommons.org/ns#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">
+ <metadata>
+ <rdf:RDF>
+ <cc:Work rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type rdf:resource="http://purl.org/dc/dcmitype/StillImage"/>
+ <dc:title/>
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <rect x="308" y="-152" width="49.1" height="30.5" fill="#fff"/>
+ <rect x="308" y="-152" width="49.1" height="30.5" fill="none" stroke="#000" stroke-width="2"/>
+ <text x="332.45999" y="-134.83099" fill="#000000" font-family="sans-serif" font-size="6.77px" text-anchor="middle"><tspan x="332.45999" y="-134.83099">IFD</tspan></text>
+ <rect x="308" y="-60.7" width="49.1" height="59.8" fill="#fff"/>
+ <text x="332.46002" y="-30.227913" fill="#000000" font-family="sans-serif" font-size="6.77px" text-anchor="middle"><tspan x="332.46002" y="-30.227913">BIOS</tspan></text>
+ <rect x="308" y="-60.7" width="49.1" height="59.8" fill="none" stroke="#000" stroke-width="2"/>
+ <rect x="308" y="-91.6" width="49.1" height="30.9" fill="#fff"/>
+ <rect x="308" y="-91.6" width="49.1" height="30.9" fill="none" stroke="#000" stroke-width="2"/>
+ <text x="332.45999" y="-74.099892" fill="#000000" font-family="sans-serif" font-size="6.77px" text-anchor="middle"><tspan x="332.45999" y="-74.099892">ME</tspan></text>
+ <rect x="308" y="-122" width="49.1" height="30.5" fill="#fff"/>
+ <rect x="308" y="-122" width="49.1" height="30.5" fill="none" stroke="#000" stroke-width="2"/>
+ <text x="332.45999" y="-104.3643" fill="#000000" font-family="sans-serif" font-size="6.77px" text-anchor="middle"><tspan x="332.45999" y="-104.3643">GBE</tspan></text>
+ <g font-family="sans-serif" font-size="6.77px">
+ <text x="265.96799" y="-149.20799"><tspan x="265.96799" y="-149.20799">0x000000</tspan></text>
+ <text x="266.362" y="-120.102"><tspan x="266.362" y="-120.102">0x001000</tspan></text>
+ <text x="266.16199" y="-88.897202"><tspan x="266.16199" y="-88.897202">0x003000</tspan></text>
+ <text x="266.14401" y="-59.324112"><tspan x="266.14401" y="-59.324112">0x200000</tspan></text>
+ <text x="266.32599" y="-1.1522589"><tspan x="266.32599" y="-1.1522589">0x400000</tspan></text>
+ </g>
+ <path d="m381-151c21 0-1.5 77.5 19.8 78.5" fill="none" stroke="#000"/>
+ <path d="m381-0.763c13.9 0 5.64-72 19.5-72" fill="none" stroke="#000"/>
+ <text x="406.12701" y="-68.513" fill="#000000" font-family="sans-serif" font-size="10.2px"><tspan x="406.12701" y="-68.513">Flash</tspan></text>
+</svg>
diff --git a/Documentation/mainboard/msi/ms7707/ms7707.md b/Documentation/mainboard/msi/ms7707/ms7707.md
new file mode 100644
index 0000000..7894318
--- /dev/null
+++ b/Documentation/mainboard/msi/ms7707/ms7707.md
@@ -0,0 +1,112 @@
+# MSI MS-7707 V1.1
+
+* MSI MS-7707 V1.1 (Medion OEM Akoya P4385D MSN10014555)
+* SandyBridge Intel P67 (BD82x6x)
+* Winbond 25Q32BV (4MB)
+* Fintek F71808A SuperIO
+* Intel 82579V Gigabit
+* NEC uPD720200 USB 3.0 Host Controller
+* IME 7.0.4.1197
+
+## Flash chip (Winbond 25Q32BV)
+```eval_rst
++---------------------+--------------------+
+| Type | Value |
++=====================+====================+
+| Size | 4 MiB |
++---------------------+--------------------+
+| BIOS range | 2 MiB |
++---------------------+--------------------+
+| Write protection | Yes (via jumper) |
++---------------------+--------------------+
+| Header | Yes (JSPI1) |
++---------------------+--------------------+
+| Package | SOIC-8 |
++---------------------+--------------------+
+| In circuit flashing | Yes |
++---------------------+--------------------+
+| Internal flashing | Yes |
++---------------------+--------------------+
+| Socketed flash | No |
++---------------------+--------------------+
+| Dual BIOS feature | No |
++---------------------+--------------------+
+| ME removable | Yes |
++---------------------+--------------------+
+```
+
+## Installation instructions
+* The standard method is to only flash the 2MiB BIOS region. In that case it's
+not needed to extract blobs from vendor firmware and internal flashing is
+sufficient.
+* To flash the whole chip (e.g. to disable ME) blobs are needed to build
+coreboot. Blobs can be extracted with util/ifdtool from 4MiB full dump image
+(see below). Its recommended to include the VGA BIOS as well (4MiB write only).
+Kconfig is prepared already if it gets enabled (path and 8086,0102).
+```
+coreboot/3rdparty/blobs/mainboard/msi/ms7707
+├── descriptor.bin
+├── gbe.bin
+├── me.bin
+└── vgabios.bin
+```
+* Never write a full 4MiB image if blobs are not included. The generated
+coreboot.rom file is always 4MiB but the 2MiB flash command below will only
+flash the last 2MiB (BIOS) block.
+* The J1-Jumper sets the 'Flash Descriptor Override Strap-Pin' and enables
+full 4MiB access for internal flasher (read and write).
+* **Write BIOS-range** (2MiB) with J1-Jumper=off (as on picture/default
+ position):
+```
+flashrom -p internal:ich_spi_force=yes --noverify-all --ifd -i bios -w coreboot.rom
+```
+* **Read full dump** (4MiB) with J1-jumper=on:
+```
+flashrom -p internal -r original.rom
+```
+* **Write full dump** (4MiB) with J1-Jumper=on:
+```
+flashrom -p internal -w coreboot.rom
+```
+* After successful flashing turn main power off, wait some seconds to drain
+the capacitors, pull the battery and set the JBAT (clrcmos) jumper for some
+seconds. Setting the jumper alone is not enough (the Fintek is VBAT backed).
+Put all back in place and restart the board. It might need 1-2 AC power cycles
+to reinitialize (running at full fan speed - don't panic).
+* External flashing has been tested with RPi2 without main power connected.
+3.3V provided by RPi2. Read more about flashing methods [here](https://doc.coreboot.org/flash_tutorial/index.html).
+* In case of going back to proprietary BIOS create/save cmos settings as early
+as possible (do not leave BIOS on first start without saving settings).
+The BIOS might corrupt nvram (not cmos!) and leave the system in a dead state
+that needs an external flasher to revive. If stuck, reset the Fintek (see
+above) and restart the system several times and/or try setting J1 to
+temporarily disable ME.
+
+
+
+* The JSPI1 header (5×2 2.0mm pitch pin header) for external flashing is
+directly connected to the flash chip. Additional 3.3V to /HOLD and /WP is not
+needed (internally re-routed already).
+
+
+
+
+
+
+
+## Flash layout
+
+* The 4MiB flashrom is divided into 4 sections:
+
+![][flashlayout]
+
+## Links
+
+- [BIOS ROM]
+- [Fintek F71808A datasheet]
+- [Winbond 25Q32BV datasheet]
+
+[BIOS ROM]: https://www.medion.com/de/servicebackend/_lightbox/treiber_details.php?did=9744
+[Winbond 25Q32BV datasheet]: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf
+[Fintek F71808A datasheet]: https://www.alldatasheet.com/datasheet-pdf/pdf/459069/FINTEK/F71808A.html
+[flashlayout]: flashlayout.svg
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