[coreboot-gerrit] Change in coreboot[master]: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config

[Angel Pons (Code Review)]

Attention is currently required from: Felix Singer, Erik van den Bogaert, Michał Żygowski, Subrata Banik, Frans Hendriks, Tim Wawrzynczak, Michael Niewöhner, Patrick Rudolph, Piotr Król.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60722 )

Change subject: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/60722/comment/13b9fdaa_01e61d0d 
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