4 comments:
File src/northbridge/intel/i945/early_init.c:
Patch Set #1, Line 163: pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x80); /* ACPI_CNTL: Enable ACPI BAR */
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Patch Set #1, Line 166: pci_write_config8(PCI_DEV(0, 0x1f, 0), GPIO_CNTL, 0x10); /* GC: Enable GPIOs */
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File src/northbridge/intel/i945/raminit.c:
Patch Set #1, Line 255: pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_2, reg8);
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Patch Set #1, Line 263: pci_write_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_2, reg8);
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