Andrey Petrov uploaded patch set #3 to this change.

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soc/intel/broadwell_de: Re-read SPD on CRC error

I2C bus does not guarantee data integrity. As result, sometimes
we end up detecting CRC errors and not adding DIMMs to SMBIOS tables.
This change adds re-tries on such errors.

TEST=let OCP monolake run without fan and try reading SPD data in tight
loop. CRC errors were reported but subsequent retries were error free.

Change-Id: I650c8cd80f75b603db332024748a91af6171f096
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
---
M src/soc/intel/fsp_broadwell_de/romstage/memory.c
1 file changed, 29 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/37303/3

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Gerrit-Project: coreboot
Gerrit-Branch: 4.11_branch
Gerrit-Change-Id: I650c8cd80f75b603db332024748a91af6171f096
Gerrit-Change-Number: 37303
Gerrit-PatchSet: 3
Gerrit-Owner: Andrey Petrov <anpetrov@fb.com>
Gerrit-Reviewer: Andrey Petrov <anpetrov@fb.com>
Gerrit-Reviewer: David Hendricks <david.hendricks@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Werner Zeh <werner.zeh@siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset